TMR Device with Improved MgO Barrier

ABSTRACT

A method of forming a high performance magnetic tunnel junction (MTJ) is disclosed wherein the tunnel barrier includes at least three metal oxide layers. The tunnel barrier stack is partially built by depositing a first metal layer, performing a natural oxidation (NOX) process, depositing a second metal layer, and performing a second NOX process to give a M OX1 /M OX2  configuration. An uppermost metal layer on the M OX2  layer is not oxidized until after the MTJ stack is completely formed and an annealing process is performed to drive unreacted oxygen in the M OX1  and M OX2  layers into the uppermost metal layer. In an alternative embodiment, a plurality of metal oxide layers is formed on the M OX1  layer before the uppermost metal layer is deposited. The resulting MTJ stack has an ultralow RA around 1 ohm-μm 2  and maintains a high magnetoresistive ratio characteristic of a single metal oxide tunnel barrier layer.

This is a continuation of U.S. patent application Ser. No. 12/927,698,filed on Nov. 22, 2010, which is herein incorporated by reference in itsentirety, and assigned to a common assignee.

RELATED PATENT APPLICATION

This application is related to U.S. Patent Application Publication2007/0111332; Ser. No. 11/280,523, filed on Nov. 16, 2005; assigned to acommon assignee and herein incorporated by reference in its entirety.

FIELD

The present disclosure relates to a high performance tunnelingmagnetoresistive (TMR) sensor in a recording head and a method formaking the same, and in particular, to a method of forming a tunnelbarrier layer between a pinned layer and free layer that improvesreliability, decreases the resistance×area (RA) value to about 1 ohm-cm²or less while maintaining a high magnetoresistive (MR) ratio.

BACKGROUND

A TMR sensor serves as a memory element in Magnetic Random Access Memory(MRAM) devices and in magnetic read heads, and typically includes astack of layers with a configuration in which two ferromagnetic layersare separated by a thin non-magnetic dielectric layer. In a magneticread head, the TMR sensor is formed between a bottom shield and a topshield, and the tunnel barrier layer must be extremely uniform inthickness and oxidation state since small thickness variations or slightoxidation differences result in large resistance variations that degradedevice performance. In a MRAM device, the TMR sensor is formed between abottom conductor and a top conductor.

The TMR sensor is also referred to as a magnetic tunnel junction (MTJ)and may have a bottom spin valve configuration wherein a seed layer,anti-ferromagnetic (AFM) layer, pinned layer, tunnel barrier, freelayer, and cap layer are sequentially formed on a substrate. The pinnedlayer has a magnetic moment that is fixed by exchange coupling with theadjacent AFM layer that is magnetized in an in-plane direction. The freelayer has an in-plane magnetic moment that is generally perpendicular tothat of the pinned layer but is free to rotate 180 degrees under theinfluence of an external magnetic field generated by passing a currentbetween the bottom shield and top shield in a direction perpendicular tothe planes of the MTJ layers. A thin tunnel barrier layer is used sothat a current through it can be established by quantum mechanicaltunneling of conduction electrons. It is the relative orientation of themagnetic moments between the free and pinned layers that determines thetunneling current and therefore the resistance of the tunnelingjunction. A sense current detects either a lower resistance (“0” memorystate) or a high resistance (“1” memory state) depending on the relativemagnetic orientation of the pinned and free layers.

A TMR sensor is currently the most promising candidate for replacing agiant magnetoresistive (GMR) sensor in upcoming generations of magneticrecording heads. An advanced TMR sensor may have a cross-sectional areaof about 0.1 microns×0.1 microns or less at the air bearing surface(ABS) plane of the read head. The advantages of a TMR sensor are ahigher MR ratio and the preference for current perpendicular to plane(CPP) geometry for high recording density. A high performance TMR sensorrequires a low RA (resistance×area) value, high MR ratio, a soft freelayer with low magnetostriction (λ), a strong pinned layer, and lowinterlayer coupling through the barrier layer. The MR ratio is dR/Rwhere R is the minimum resistance of the TMR sensor and dR is the changein resistance observed by changing the magnetic state of the free layer.A higher dR/R improves the readout speed. For very high recordingdensity or high frequency applications, RA must be reduced to about 1ohm-um² or less. As a consequence, MR ratio drops significantly. Tomaintain a reasonable signal-to-noise (SNR) ratio and improvedreliability (longer lifetime), a MTJ that provides both of a high MRratio and ultra low RA value (≦1 ohm-um²) is desirable.

A very high MR ratio has been reported by Yuasa et. al in “Giantroom-temperature magnetoresistance in single crystal Fe/MgO/Fe magnetictunnel junctions”, Nature Materials 3, 868-871 (2004) and is attributedto coherent tunneling. Parkin et al in “Giant tunnelingmagnetoresistance at room temperature with MgO (100) tunnel barriers”,Nature Materials 3, 862-867 (2004) demonstrated that an MR ratio ofabout 200% can be achieved with epitaxial Fe(001)/MgO(001)/Fe(001) andpolycrystalline FeCo(001)/MgO(001)/(Fe₇₀CO₃₀)₈₀B₂₀ MTJs at roomtemperature. In addition, Djayaprawira et. al described a high MR ratioof 230% with advantages of better flexibility and uniformity in “230%room temperature magnetoresistance in “CoFeB/MgO/CoFeB magnetic tunneljunctions”, Physics Letters 86, 092502 (2005). However, RA values in theMTJs mentioned above are in the range of 240 to 10000 ohm-um² which istoo high for read head applications. Tsunekawa et. al in “Gianttunneling magneto resistance effect in low resistanceCoFeB/MgO(001)/CoFeB magnetic tunnel junctions for read headapplications”, Applied Physics Letters 87, 072503 (2005) found areduction in RA by inserting a DC-sputtered metallic Mg layer between abottom CoFeB layer and rf-sputtered MgO. The Mg layer improves thecrystal orientation of the MgO(001) layer when the MgO(001) layer isthin. The MR ratio of CoFeB/Mg/MgO/CoFeB MTJs can reach 138% at RA=2.4ohm-um². The idea of metallic Mg insertion was initially disclosed byLinn in U.S. Pat. No. 6,841,395 to prevent oxidation of the bottomelectrode (CoFe) in a CoFe/MgO(reactive sputtering)/NiFe structure.

Although a high MR ratio and low RA have been demonstrated in MTJshaving a MgO barrier layer, there are still many issues to be resolvedbefore such configurations can be implemented in a TMR sensor of a readhead. For example, the annealing temperature needs to be lower than 300°C. for read head processing, and rf-sputtered MgO barriers make controlof RA mean and uniformity more difficult than with conventionalDC-sputtered and subsequently naturally oxidized AlOx barriers.Moreover, a CoFe/NiFe free layer is preferred over CoFeB for low λ, andsoft magnetic properties but when using a CoFe/NiFe free layer incombination with a MgO barrier, the MR ratio will degrade to very nearthat of a conventional AlOx MTJ. Thus, a TMR sensor is needed thatincorporates MgO or other metal oxide barriers without compromising anydesirable properties such as high MR ratio, a low RA value, and lowmagnetostriction.

SUMMARY

One objective of the present disclosure is to provide a TMR sensor witha multilayer tunnel barrier that enables a low RA of about 1 ohm-μm² orless while maintaining a high MR ratio that is characteristic of asingle MgO tunnel barrier layer.

A second objective of the present disclosure is to provide the TMRsensor according to the first objective without limiting devicethroughput.

According to a first embodiment, these objectives are achieved byforming a TMR sensor comprised of at least a free layer, a pinned layer,and a tunnel barrier layer between the pinned and free layers whereinthe tunnel barrier is a multilayer structure having multiple metal oxidelayers. In a bottom spin valve scheme with a pinned layer/tunnelbarrier/free layer configuration, the first metal oxide layer (M_(OX1))adjoining the pinned layer preferably has a greater thickness than asecond metal oxide layer (M_(OX2)) which in turn has a greater thicknessthan a third metal oxide layer (M_(OX3)) to give aM_(OX1)/M_(OX2)/M_(OX3) configuration where M is one of MgZn, Zn, Al,Ti, AlTi, Hf, or Zr. Each metal layer is deposited and oxidized with anatural oxidation (NOX) treatment before a subsequent metal layer islaid down. However, the uppermost metal layer is not treated with NOX.It is transformed into an oxide by oxygen diffusion from underlyinglayers mostly during an annealing process. Preferably, the first metal(M1) layer is deposited with a thickness greater than 4 Angstroms inorder to provide a continuous layer which is essentially free ofpinholes. The uppermost metal oxide layer is preferably the thinnest toavoid overoxidation that could lead to oxygen diffusion into theadjoining free layer. Alternatively, a fourth metal oxide layer(M_(OX4)) is formed on the M_(OX3) layer to give aM_(OX1)/M_(OX2)/M_(OX3)/M_(OX4) tunnel barrier structure wherein each ofthe M_(OX3) and M_(OX4) layers is made from a metal layer having athickness less than the thickness of the M1 and M2 layers. Thus, M_(OX1)is derived from the M1 layer, M_(OX2) is an oxidized M2 layer, and soforth wherein the relative thickness of the layers is in the orderM_(OX1)>M_(OX2)>M_(OX3), M_(OX4). In another embodiment, more than fourmetal oxide layers may be employed.

In one aspect, the TMR sensor may have a configuration represented byseed layer/AFM layer/pinned layer/tunnel barrier/free layer/cap layerwherein the pinned layer has a synthetic anti-ferromagnetic (SyAF)structure comprised of an AP2/coupling/AP1 configuration in which thecoupling layer is Ru. Typically, the TMR stack of layers including themultiple M layers in the tunnel barrier are laid down in a sputterdeposition system. A key feature is that all of the M layers except forthe last metal layer deposited are oxidized with a natural oxidation(NOX) method. Furthermore, the pinned layer in a bottom spin valveconfiguration may be treated with Ar plasma or a light oxidation priorto depositing the first M layer in order to improve the interfacebetween the pinned layer and first M layer. Also, the uppermost M layermay be treated with Ar plasma, a low dose of oxygen, an Ar/O2 mixture,or other inert gas mixtures before the free layer is sputter deposited.One purpose of these treatments is to minimize metal inter-diffusion atthe interface between free layer and tunnel barrier. Another purpose isto form better bonding between Mg and oxygen before depositing the freelayer. A subsequent anneal step essentially forms a uniform metal oxidelayer. The aforementioned plasma or gas treatments are advantageous informing a smoother and more uniform tunnel barrier layer and sharperinterfaces that may help to improve dR/R and/or other deviceperformance.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view showing a TMR sensor that is formedaccording to a first embodiment of the present disclosure.

FIG. 2 is a cross-sectional view depicting a TMR sensor that is formedaccording to a second embodiment of the present disclosure.

FIG. 3 is a process flow diagram that depicts the steps involved informing a tunnel barrier layer according to one embodiment of thepresent disclosure.

FIG. 4 is a cross-sectional view of a TMR sensor stack of layers thathas been patterned to generate a sidewall, and a top surface thatcontacts an overlying top electrode or top shield.

DETAILED DESCRIPTION

The present disclosure is a high performance TMR sensor having a tunnelbarrier layer comprised of multiple metal oxide layers and a method formaking the same. The TMR sensor configurations described herein may beemployed in a magnetic recording head, in MRAM devices, or in other filmstructures involving oxidation or nitridation of metal layers. In otherwords, for tunnel barriers or other layers comprised of an oxynitride ornitride composition, multiple metal layers may be deposited and nitridedor oxynitrided in the same fashion as the tunnel barrier fabricationsequence of the present disclosure. Although the exemplary embodimentsdepict bottom spin valve structures, the present disclosure alsoencompasses top spin valve and multilayer spin value configurations asunderstood by those skilled in the art. The drawings are provided by wayof example and are not intended to limit the scope of the disclosure.

In U.S. Patent Application Publication 2007/0111332, we disclosed amethod of forming a low resistance TMR sensor with a process comprisingthe deposition of a first Mg layer, performing a natural oxidation, andthen depositing a second Mg layer on the oxidized first Mg layer to givea MgO/Mg bilayer. A subsequent annealing step causes further oxygendiffusion from MgO into the Mg layer to produce an essentially uniformMgO tunnel barrier layer that results in a low RA value of around 2ohm-μm² without compromising the MR ratio. With the continuing demandfor higher density recording and storage devices, the RA value must befurther reduced to about 1 ohm-μm² or less to meet performancerequirements. To achieve a lower RA with the aforementioned MgO/Mgbilayer process, one can thin the tunnel barrier thickness and/or reducethe natural oxidation (NOX) “dose” which means less oxidation timeand/or lower oxygen pressure. However, the bilayer has limitations withregard to low RA extendibility. For example, simply reducing the NOXdose without adjusting Mg thickness will lower dR/R (MR ratio) anddegrade device stability due to underoxidation. Furthermore, reducingthe total Mg thickness leads to a lower breakdown voltage, and devicelifetime is likely to suffer. Therefore, no acceptable pathway to a TMRsensor with an ultra low RA and high MR ratio exists with a single MgOlayer or a bilayer MgO/Mg configuration.

In order to simultaneously achieve an ultra low RA value of about 1ohm-μm² or less without degrading the MR ratio, we have surprisinglydiscovered that the tunnel barrier layer thickness may be kept constantcompared with the previously disclosed bilayer structure by increasingthe number of metal oxide layers within the tunnel barrier stack. Whenthe number of MgO or other metal oxide layers below the upper Mg (orother metal layer) is at least two or three prior to the annealing step,we find substantially improved tunnel barrier uniformity andperformance. According to one embodiment, a tunnel barrier stackcomprised of a MgO₁/MgO₂/MgO₃/Mg or MgO₁/MgO₂/Mg configuration may beformed before an annealing step converts the stack to a final oxidizedstate represented by MgO₁/MgO₂/MgO₃/MgO₄ or MgO₁/MgO₂/MgO₃,respectively, where the number refers to the order of formation in thestack. In addition, a plasma or light oxidation treatment of thesubstrate may be performed before the metal layer is laid down, and/or aplasma or light oxidation treatment of the upper unoxidized metal layermay be performed before the free layer and pinned layer are depositedand annealing is performed to further improve tunnel barrier smoothnessand interface sharpness. Alternatively, Mg may be replaced by othermetals or metal alloys as explained later to generateM_(OX1)/M_(OX2)/M_(OX3) or M_(OX1)/M_(OX2)/M_(OX3)/M_(OX4)configurations.

Referring to FIG. 1, a portion of a partially formed magnetic device 40of the present disclosure is shown from the plane of an air bearingsurface (ABS). There is a substrate 21 that in a magnetic recording headembodiment is a bottom lead otherwise known as a bottom shield (S1)which may be a NiFe layer, for example, that is formed by a conventionalmethod on a substructure (not shown). It should be understood that thesubstructure is typically comprised of a first gap layer disposed on awafer made of AlTiC, for example. In a MRAM embodiment, the substratemay be a bottom electrode.

A TMR stack 32 is formed on the substrate 21 and in the exemplaryembodiment has a bottom spin valve configuration wherein a seed layer22, AFM layer 23, and a pinned layer 24 are sequentially formed on thesubstrate as the bottom portion of the TMR stack. The seed layer 22 maybe made of Ta/Ru, Ta, Ta/NiCr, Ta/Cu, Ta/Cr, or other materials used inthe art. The seed layer 22 serves to promote a smooth and uniform grainstructure in overlying layers. Above the seed layer 22 is an AFM layer23 used to pin the magnetization direction of the overlying pinned layer24. The AFM layer 23 is preferably one of IrMn, MnPt, NiMn, OsMn, RuMn,RhMn, PdMn, RuRhMn, or MnPtPd.

The pinned layer 24 may have a synthetic anti-parallel (SyAP)configuration (not shown) represented by AP2/Ru/AP1. The AP2 layer(outer pinned layer) is formed on the AFM layer 23 and may be made ofCoFe or other ferromagnetic materials. The magnetic moment of the AP2layer is pinned in a direction anti-parallel to the magnetic moment ofthe AP1 layer. A slight difference in thickness between the AP2 and AP1layers produces a small net magnetic moment for the SyAP pinned layer 24along the easy axis direction of the TMR sensor to be patterned in alater step. Exchange coupling between the AP2 layer and the AP1 layer isfacilitated by a coupling layer that is preferably comprised of Ru witha thickness of from 3 to 9 Angstroms although Rh or Ir may be usedinstead of Ru. In a preferred embodiment, the AP1 layer (inner pinnedlayer) is one or more of CoFe, CoFeB, CoNiFe, CoNiFeB, or alloys thereofwith other elements such as Ta, Ru, Mg, Hf, Zr, Zn, W, Cu, Ag, and Au,and is formed on a Ru coupling layer which is about 7.5 Angstroms thick.Note that “inner pinned layer” is meant to indicate the portion of thepinned layer that is closest to the barrier layer and “outer pinnedlayer” is meant to signify the portion of the pinned layer farthest fromthe barrier layer.

In the exemplary embodiment (FIG. 1) that features a TMR sensor with abottom spin valve configuration, the tunnel barrier layer 29 is a stackof layers 25-27 formed on the top surface 24 s of the pinned layer 24,and there is a free layer 30 and cap layer 31 sequentially formed on thetunnel barrier. In a top spin valve configuration (not shown the TMRstack 32 according to the present disclosure would involve thesequential deposition of a seed layer 22, free layer 30, tunnel barrierlayer 29, pinned layer 24, AFM layer 23, and cap layer 31 on thesubstrate 21. In a top spin valve, the AP1 layer (inner pinned layer) isdisposed on the uppermost layer 27 in the tunnel barrier stack.

A key feature of the present disclosure according to a preferredembodiment is the formation of a tunnel barrier layer 29 having multiplemetal oxide layers on the inner (AP1) portion of the pinned layer 24.Preferably, a sequence of at least three metal or alloy (M) layers islaid down and after each metal or alloy deposition except for theuppermost and final M layer, a natural oxidation process is performed toconvert M into an M_(OX) layer where (OX) indicates an oxidized state.However, the number of metal layers used to form the tunnel barrier maybe more than three or four. M may be selected from Mg, MgZn, Zn, Al, Ti,AlTi, Hf, Zr or a combination thereof. Preferably, the first metal (M1)layer deposited has a thickness greater than the second (M2) metal layerwhile third and subsequent (M3, M4, . . . Ms) metal layers have athickness less than the M2 layer thickness. According to one embodiment,M1 has a thickness between 4 to 8 Angstroms, M2 thickness is from 2 to 4Angstroms, and M3 to Ms layers have a 0.5 to 3 Angstrom thickness wheres is an integer >4. Preferably, the combined thickness of all M layersis less than 10 Angstroms for an RA less than 1 ohm-cm².

The M1 layer has a greater thickness than other M layers, and preferablygreater than 4 Angstroms in order to generate a continuous metal layerfree of pinholes before the first M_(OX) layer is formed. The formationof at least three M_(OX) layers provides an advantage over a bilayerscheme in that a more uniform tunnel barrier is produced. It should beunderstood that as a metal layer thickness increases, a stronger NOXdose (longer oxidation time and/or higher oxygen pressure) is requiredto oxidize the layer. Therefore, according to one embodiment of thepresent disclosure where relative thickness is in the order M1>M2>M3,and M3 becomes fully oxidized during an annealing step, the NOX dose forthe M1 layer is higher than for M2. In a second embodiment whereinrelative thickness is on the order M1>M2>M3, M4, and M4 becomes fullyoxidized during a subsequent annealing step, the NOX dose for M1 ishigher than for M2, and M2 NOX dose is higher than that for M3. Asdescribed in related patent application Ser. No. 11/280,523, the Mglayer in a MgO/Mg bilayer stack may be fully oxidized during an annealprocess after the TMR stack is formed. Similarly, the uppermost M3, M4,or Ms layer where s is an integer >4 in the present disclosure isoxidized during an anneal step after all layers in the TMR sensor stackhave been formed. This oxidation sequence minimizes the chance ofoveroxidation in the uppermost M_(OX) layer since NOX of an uppermost Mlayer is likely to result in excess oxygen absorbed within the resultingM_(OX) layer that can subsequently diffuse into the free layer and causeoxidation therein. It is believed that there is enough oxygen in the TMRsensor and especially within the M_(OX) sub-layers to diffuse into theuppermost M layer during the anneal step and cause essentially completeoxidation therein.

We have also discovered that tunnel barrier uniformity may be furtherimproved by performing a plasma treatment with an inert gas such as Ar,or with a light natural oxidation (NOX) of top surface 24 s prior todepositing the M1 layer. Although the mechanism is not completelyunderstood, we have found that a plasma treatment with Ar or the likecauses the subsequent growth of a Mg (or another metal layer) to occurmore uniformly which leads to a more uniform tunnel barrier layer. Atypical Ar plasma treatment comprises a RF power of 10 to 50 Watts and apressure of 1E-4 to 1 Torr. A light oxidation is defined as exposure oftop surface 24 s to oxygen at a pressure of 0.001 to 0.01 mTorr for atime of 10 to 600 seconds in an oxidation chamber of a sputterdeposition mainframe, for example. Shorter or longer oxidation times arenot preferred because of a loss of process control or slower throughput.Thus, a smoother pinned layer 24 results in a more uniform M1 layer andbetter uniformity in all M layers. As a result, the oxidized tunnelbarrier structure will have significantly higher uniformity in eachM_(OX) layer that translates into lower RA without compromising the MRratio.

In one embodiment as illustrated in FIG. 1, the M1 layer is oxidized toM_(OX1) (layer 25) followed by deposition of an M2 layer and oxidationto M_(OX2) (layer 26) followed by deposition of an M3 layer wherein alloxidations are NOX processes. Note that the M3 layer becomes a M_(OX3)layer 27 during a subsequent anneal step when oxygen from layers 25, 26diffuses into the uppermost M3 layer. Usually, for M layer thicknessesbetween 0.5 and 8 microns, the NOX process comprises an oxygen pressureof 0.1 mTorr to 1 Torr for about 15 to 300 seconds in an oxidationchamber of a sputter deposition mainframe. Moreover, the gas compositionmay include an inert gas such as Ar, Xe, or Ne in addition to oxygen.

A process flow diagram is provided in FIG. 3. A plasma treatment with aninert gas may be performed in step 50 on a substrate in a DC sputteringchamber of a sputtering system such as an Anelva C-7100 sputterdeposition system which includes ultra high vacuum DC magnetron sputterchambers. Although the exact mechanism is not understood, the plasmatreatment results in a more uniform growth of the first M layer that inturn leads to a more uniform tunnel barrier. Alternatively, step 50 maycomprise a light natural oxidation of the substrate to promote a betterinterface between the substrate and the first M layer to be deposited inthe following step. The oxygen in step 50 is absorbed on the surface ofthe substrate and reacts with a bottom portion of the subsequentlydeposited first M layer. In this context, “light” oxidation means acondition that does not cause the substrate to become oxidized. In oneaspect relating to a bottom spin valve configuration and FIGS. 1-2, thesubstrate in step 50 is the pinned layer 24. Alternatively, step 50 maybe omitted and tunnel barrier formation begins with step 51 wherein afirst M layer is deposited on the substrate which is pinned layer 24 inthe exemplary embodiments. Typically, the sputter deposition processinvolves an argon sputter gas and a base pressure between 5×10⁻⁸ and5×10⁻⁸ torr. Each sputter chamber has multiple targets which are lowpressure discharge cathodes. A lower pressure enables more uniform filmsto be deposited.

The next step in the tunnel barrier layer formation sequence is apreviously described natural oxidation (NOX) process (step 52) wherebythe first M layer deposited in step 51 is converted to a first M_(OX)layer 25. Typically, no heating or cooling is applied to the oxidationchamber during the NOX process. It should be noted that oxygen pressuresbelow 0.1 mTorr are not recommended during NOX processes because of toollimitations. On the other hand, an ultra low RA value of about 1 ohm-um²or less becomes difficult to achieve if the oxygen pressure increasesabove 1 Torr.

In step 53 (FIG. 3), the sequence of a metal deposition followed by anatural oxidation in steps (51, 52) is repeated at least one more time.According to one embodiment as depicted in FIG. 1, step 53 comprises thedeposition of a second metal (M) layer and then natural oxidation togive a second M_(OX) layer 26 on layer 25. Preferably, the second M_(OX)layer 26 is thinner than the first M_(OX) layer 25. Thereafter, in step54 a third metal (M) layer is deposited on the second M_(OX) layer. Thethird M layer remains in a substantially unoxidized state duringoptional step 55 wherein an inert plasma or light oxidation treatment isperformed. Again, the inert gas/oxygen treatment of the top surface ofthe uppermost M layer leads to a better interface with a subsequentlydeposited free layer.

Once the free layer and cap layer are deposited on the upper M layer, anannealing step is performed which converts the upper M layer to a thirdM_(OX) layer 27. The upper M layer has a thickness between 0.5 and 3Angstroms before oxidation and serves to protect the subsequentlydeposited free layer from oxidation. It is believed that excessiveoxygen accumulates within one or more of the first M_(OX) layer 25 andsecond M_(OX) layer 26 as a result of previous NOX processes and thisoxygen could diffuse into and oxidize a free layer that is formeddirectly on a metal oxide that has been generated by a NOX (or radicaloxidation) process. In effect, the uppermost M layer intercepts theoxygen that diffuses out of the MOX sub-layers by reacting with theoxygen to form a substantially oxidized uppermost M_(OX) layer in thetunnel barrier stack.

Note that the RA and MR ratio for the TMR sensor stack 32 may beadjusted by varying the thickness of the upper M layer (and resultingM_(OX) layer 27) and by varying the natural oxidation time and pressureof each NOX step. Preferably, the tunnel barrier 29 should not beoveroxidized which will drive up RA to undesirable values, orunderoxidized which lowers dR/R and causes lower device stability.Underoxidized is defined as a condition where a significant portion ofthe metal atoms in any of the M_(OX) layers remain unoxidized or in alow oxidation state while overoxidation means essentially all of themetal atoms in the M_(OX) layers are in a fully oxidized state and thereis additional oxygen bound to the M_(OX) layers or contained within atleast one M_(OX) layer that is free to diffuse into adjacent layers.

Returning to FIG. 2, tunnel barrier 29 is fabricated with the same setof processes as described with respect to the first embodiment (FIG. 1).However, the second embodiment of the present disclosure furthercomprises at least a third sequence of step 51 followed by step 52thereby forming a stack of three M_(OX) layers 25-27. As in the firstembodiment, the second M_(OX) layer 26 is preferably thinner than thefirst M_(OX) layer 25. Moreover, the third M layer generally has athickness less than the second M layer to accommodate a weaker (NOX)oxidation and avoid an overoxidized state where excess oxygen within theresulting third M_(OX) layer 27 could diffuse into the overlying freelayer 30 during a subsequent anneal step. Thus, the present disclosureanticipates that the third MOX layer 27 may be oxidized with a weakerNOX dose which means a lower oxygen pressure and/or less oxidation timecompared with the oxidation of the first two M layers. In thisembodiment, step 54 comprises the deposition of a fourth M layer on thethird M_(OX) layer 27. The uppermost M layer becomes fully oxidized toM_(OX) layer 28 during a subsequent annealing step. The upper M_(OX)layer 28 has a top surface 28 s.

In an embodiment wherein an alloy of MgZn or AlTi is selected for atleast one M layer, the alloy may be sputter deposited using a MgZn orAlTi target, or by using separate Mg and Zn (or Al and Ti) targets.

Once the M_(OX1)/M_(OX2)/M₃ or M_(OX1)/M_(OX2)/M_(OX3)/M₄ tunnel barrierstructure is built at an intermediate stage of the TMR fabricationscheme according to first and second embodiments, respectively, a freelayer 30 is formed on the uppermost M layer and is comprised of one ormore of the materials previously described with respect to the AP1portion of pinned layer 24. Above the free layer is a cap layer 31 thatmay have a Ru/Ta/Ru or Ru/Ta configuration, for example. In oneembodiment, the free layer 30 and cap layer 31 are deposited in the samesputtering chamber as layers 22-24. Optionally, more than one sputterdeposition chamber may be used to deposit the layers in TMR stack 32.

Once the TMR stack 32 is complete, the partially formed magnetic device40 may be annealed in a vacuum oven within the range of 250° C. to 350°C. with an applied field of at least 5000 Oe for a period of 2 to 10hours to set the pinned layer and free layer magnetization directions.It should be understood that depending upon the time and temperatureinvolved in the anneal process, unreacted oxygen in the underlyingM_(OX) layers diffuses into the uppermost M layer and causes substantialif not total oxidation therein. Although a certain number of metal atomsmay remain unoxidized, the uppermost layer in the tunnel barrier stackis still considered to be in a fully oxidized (M_(OX)) state.

Referring to FIG. 4, the TMR stack 32 is patterned by following aconventional process sequence. For example, a photoresist layer (notshown) may be formed on the cap layer 31. After the photoresist layer ispatterned to form openings that uncover certain regions of cap layer 31,an ion beam etch (IBE) or reactive ion etch (RIE) sequence may beemployed to remove underlying portions of layers in the TMR stack thatare exposed by openings in the photoresist layer. In the exemplaryembodiment, the etch process stops on the substrate 21 to give a TMRsensor 32 with a top surface 31 t and sidewalls 32 s. Thereafter, aninsulating layer 33 may be deposited along the sidewalls of the TMRsensor. The photoresist layer is removed by a well known lift offprocess. Alternatively, in a magnetic recording head embodiment, a biasstructure (not shown) may be formed within an insulation layer andproximate to sidewall 32 s to keep the magnetization direction of thefree layer oriented in an in-plane direction.

According to one embodiment relating to a magnetic recording head, a toplead otherwise known as a top shield 34 is then deposited on theinsulating layer 33 and TMR element 32. Similar to the bottom shield 21,the top shield 34 may also be a NiFe layer about 2 microns thick. TheTMR read head 40 may be further comprised of a second gap layer (notshown) disposed on the top shield 34.

In an MRAM embodiment, a top conductor 34 such as a bit line is formedon a top surface 31 t of the TMR element 32.

An experiment was conducted to demonstrate the improved performanceachieved by implementing a tunnel barrier layer in a TMR sensor stackformed according to an embodiment of the present disclosure. As areference, a TMR stack of layers identified as Example A was preparedaccording to a MgO/Mg bilayer process previously disclosed in U.S.Patent Application Publication 2007/0111332. Additional samples shown asExample B and Example C were fabricated according to first and secondembodiments, respectively, of the present invention. In all Examples,the TMR stack has the same structure except for the tunnel barrier layeras summarized in Table 1. In particular, aTa/Ru/IrMn/CoFe/Ru/FeCoB/tunnel barrier/CoFe/CoFeB/CoFeBTa/NiFe/Ru/Taconfiguration is used and comprises a Ta/Ru seed layer, IrMn AFM layer,CoFe/Ru7.5/CoFe pinned layer, CoFe3/CoFeB20/CoFeBTa8/NiFe40 free layer,and a Ru10/Ta60 capping layer. The thickness of each layer is shownfollowing the composition of the layer. The TMR stack was formed on aNiFe substrate and was annealed under vacuum at 280° C. for 5 hours withan applied field of 8000 Oe. The advantages of the present disclosureare that an ultra low RA value of around 1 ohm-um² is realized whilemaintaining a high MR ratio of about 60% similar to the MTJ where thetunnel barrier is a bilayer structure (Example A), and without affectingfree layer magnetic properties. In Example C, where four MgO layers areformed within the tunnel barrier following a process sequence that endswith an anneal step, a MR ratio of 62% was achieved with a RA value of1.0 ohm-um² in a 0.6 um circular device. The NOX process applied in theexamples involves an oxygen pressure of about 0.001 to 1 mTorr for 5 to100 seconds depending on the thickness of the Mg layer to be oxidized.

TABLE 1 MR Ratio and RA values of MTJs with different tunnel barrierstructure in Ta/Ru/IrMn/CoFe24/Ru7.5/CoFe23/barrier/CoFe3/CoFeB20/CoFeBTa8/NiFe40/Ru/Ta Film Type Tunnel Barrier structureRA dR/R Example A Mg5.5/NOX/Mg3 1.1 61% Example B Mg5/NOX/Mg3/NOX/Mg0.51.1 62% Example C Mg5/NOX/Mg3/NOX/Mg0.5 1.0 60% Example DMg4.5/NOX/Mg3/NOX/Mg0.5/NOX/Mg0.5 1.0 62%

Example B (in comparison with Example A) and Example D (in comparisonwith Example C) demonstrate that more lamination of a barrier layergives better dR/R with the same RA for an overall improvement in barrierquality. Also, Example D (in comparison with Example A) demonstratesthat a lower RA value and higher dR/R can be achieved with a tunnelbarrier including four metal oxide layers compared with a prior artbilayer scheme. As a result of better barrier quality, device stability,lifetime, and signal to noise ratio (SNR) are all improved byimplementing a multilayer metal oxide tunnel barrier stack according tothe present disclosure. The total thickness of the tunnel barrier layercan be kept at previous levels to avoid a change to a thinner tunnelbarrier that would lead to a lower breakdown voltage. It should beunderstood that the advantages described herein are achieved without anysignificant loss in throughput since the extra metal deposition andnatural oxidation steps represent minimal adjustments in the overallfabrication scheme.

While this disclosure has been particularly shown and described withreference to, the preferred embodiment thereof, it will be understood bythose skilled in the art that various changes in form and details may bemade without departing from the spirit and scope of this disclosure.

1. A magnetic tunnel junction (MTJ), comprising: (a) a pinned layer; (b)a free layer; and (c) a tunnel barrier layer formed between thereference layer and free layer wherein the tunnel barrier is made of astack of at least three metal oxide layers and wherein at least one ofthe metal oxide layers is comprised of a first metal, and at least oneof the metal oxide layers is comprised of a second metal that is unequalto the first metal.
 2. The MTJ of claim 1 wherein the metal in the atleast three metal oxide layers is selected from Mg, MgZn, Zn, Al, Ti,AlTi, Hf, Zr or a combination thereof.
 3. The MTJ of claim 1 wherein thepinned layer has a synthetic anti-parallel (SyAP) configuration havingan AP2/Ru/AP1 structure wherein the AP1 layer contacts the tunnelbarrier layer and is comprised of one or more of CoFe, CoFeB, CoNiFe,CoNiFeB, or alloys thereof with other elements selected from Ta, Ru, Mg,Hf, Zr, Zn, W, Cu, Ag, and Au.
 4. The MTJ of claim 1 wherein the MTJ hasa bottom spin valve configuration in which the pinned layer, tunnelbarrier layer, and free layer are sequentially formed on a substrate,and the tunnel barrier layer has a configuration represented byM_(OX1)/M_(OX2)/M_(OX3) wherein a first metal oxide layer (M_(OX1)) hasa thickness greater than a second metal oxide layer (M_(OX2)), and theuppermost metal oxide layer (M_(OX3)) has a thickness less than that ofthe M_(OX1) and M_(OX2) layers.
 5. The MTJ of claim 1 wherein the MTJhas a bottom spin valve configuration in which the pinned layer, tunnelbarrier layer, and free layer are sequentially formed on a substrate,and the tunnel barrier layer has a configuration represented byM_(OX1)/M_(OX2)/M_(OX3)/M_(OX4) wherein a first metal oxide layer(M_(OX1)) has a thickness greater than a second metal layer (M_(OX2)),and third (M_(OX3)) and fourth (MOX4) metal oxide layers have athickness less than that of the M_(OX1) and M_(OX2) layers.